Improving Bitonic Sorting by Wire Elimination

Proceedings:
Conference:
ARCS 2010 - 23th International Conference on Architecture of Computing Systems
Town:
Hannover, Germany
Date:
02/22/2010 - 02/23/2010
Authors:
Mühlenthaler, Moritz; Wanka, Rolf (Department of Computer Science, University of Erlangen-Nuremberg, Germany)
File size:
145,80 kB
Pages:
8
Language:
english
Type:
PDF Document
Price:
15.00 €
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Abstract:

We introduce a technique called wire elimination by which it is possible to remove wires and comparators from (n,m)-merging and n-sorting circuits such that the resulting circuits are (n?,m?)-merging and n?-sorting circuits, resp., with n?<n, m?< m. By neatly choosing the wires to be removed, it is possible to obtain for n? and m? new circuits that have size less than circuits previously designed for n? and m?. We demonstrate this approach by eliminating from the classical Bitonic (2n,2n)-merging circuit 2n wires such that an (n,n)-merging circuit is obtained which has 1/2n comparators less than the classical Bitonic (n,n)-merge circuit, but still the same depth. Using the usual sorting by merging technique, we get a variant of Bitonic sort which saves 1/4n(logn?1) comparators compared to the classical variant.