Rubric: Proceedings - General Proceedings
Frontiers in Analog CAD (FAC 2017)
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Hedrich, Lars; Radojičić, Čarna (Ed.)

Frontiers in Analog CAD (FAC 2017)

July 21-22, 2017, Frankfurt am Main, Germany

2017, 49 pages, 140 x 124 mm, Slimlinebox, CD-Rom
ISBN 978-3-8007-4442-8
Personal VDE Members are entitled to a 10% discount on this title

Content Foreword

Actual trends like cyber physical systems, internet of things and autonomous driving push the need for a lot of analog content on integrated circuits to connect to the physical world. Verification and design of these analog parts takes a lot of effort of the overall design process. Additionally, actual standards like ISO 26262 increase the pressure to get the verification formalized and automatized. Using current methodologies, even well- understood analog circuits require nearly as much effort to modify and/or port to a new process as the initial design. Even when an analog circuit can be reused, validating its performance within the new system – especially if the circuit is controlled through a digital loop – is often the long pole in the overall flow. The reasons for this situation are both technical and sociological; inherent differences in the behaviors of digital vs. analog systems make analog design and validation much more resistant to automation. Similarly, the cultural distance between the EDA software developers and analog designers is much larger than the distance between them and digital designers.

The goal of this workshop is to bring together technologists and researchers from analog design as well as CAD tool development to foster collaboration and exchange of ideas as well as to spur further research into the intersection of these domains. The workshop has a long tradition (since 2005) mainly in the area of formal verification.
Prof. Dr.-Ing. Lars Hedrich, Goethe University of Frankfurt
Lars Hedrich received the Diploma degree in electrical engineering in 1992 and the Ph.D. in 1997 from the University of Hannover in 1992 and became a juniorprofessor at the same University in 2002. Since 2004 he is full professor at the Institute of Computer-Science, Goethe University of Frankfurt, and head of the design methodology group at the same institute. His research interests include several areas of analog design automation: symbolic analysis of linear and nonlinear circuits, behavioral modeling, reliability analysis and -design, circuit synthesis, and formal verification.

Dr.-Ing. Carna Radojicic, Technical University of Kaiserslautern
Carna Radojicic received her master degree in electrical engineering from the Faculty of Technical Sciences in Novi Sad in 2010. The same year she joined the Institute for Computer Technology, Vienna University of Technology where she worked till 2012. In 2012 she moved to TU Kaiserslautern where she completed her PhD in 2016. Her research interests lie in symbolic simulation, analysis and formal verification of analog and mixed-signal systems.
Search Conference Papers
1

Computer-Aided Formal Verification of Power Electronics Circuits

Authors:
Beg, Omar Ali; Nguyen, Luan; Davoudi, Ali; Johnson, Taylor T.
2

Accelerated Mixed-Signal Simulations Using Multi-Core Architecture

Authors:
Divanbeigi, S.; Aditya, E.; Olbrich, M.
3

Dynamic Simulation of Power Consumption for Model Based Design of Mixed-Signal Systems

Authors:
Pan, Xiao; Grimm, Christoph
4

Parasitic Symmetry at a Glance: Uncovering Mixed-Signal Layout Constraints

Authors:
Glaeser, Georg; Saft, Benjamin; Sommer, Ralf
5

Model Discovery for Analog/Mixed-Signal Circuits

Authors:
Dubikhin, Vladimir; Sokolov, Danil; Myers, Chris J.; Mokhov, Andrey; Yakovlev, Alex