Cover IEC 63011-1:2018
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IEC 63011-1:2018

Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology

Circulation Date: 2018-11
Edition: 1.0
Language: EN-FR - bilingual english/french
Seitenzahl: 24 VDE Artno.: 226107

Content

IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.