Design issues on the parallel implementation of versatile, highspeed iterative decoders

Conference: TURBO - CODING - 2006 - 4th International Symposium on Turbo Codes & Related Topics; 6th International ITG-Conference on Source and Channel Coding
04/03/2006 - 04/07/2006 at Munich, Germany

Proceedings: TURBO - CODING - 2006

Pages: 10Language: englishTyp: PDF

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Authors:
Benedetto, Sergio; Montorsi, Guido; Tarable, Alberto (CERCOM - Politecnico di Torino, Corso Duca degli Abruzzi 24, 10129, Torino, Italy)
Dinoi, Libero (Istituto Superiore Mario Boella, Via P. C. Boggio 61, 10138, Torino, Italy)

Abstract:
The ever increasing demand for high data rate communication, and the use of radio resource management techniques requiring frame-by-frame adaptive coding/modulation to match user demands and channel conditions, pose a number of crucial problems to the design of versatile, high-speed iterative decoders, for both turbo-like and low-density parity-check codes. Among them, we mention: - The modification of the soft-input soft-output (SISO) algorithm in a way that permits its implementation using several parallel processors working independently on segments of the received frame - The collisions in the process of reading/writing into/from the memory by the parallel processors - The design of prunable interleavers covering a wide range of information and/or code words lengths while keeping good spreading properties - The design of codes yielding a wide range of code rates with good performance for the range of probability of error of interest. The paper will touch all the previous points, offering state-of-the art solutions and examples showing their performance.