RFID SysTech 2007
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Design Methodology of a Voltage Multiplier for Full Passive Long Range UHF RFID

Conference: RFID SysTech 2007 - 3rd European Workshop on RFID Systems and Technologies
06/12/2007 - 06/13/2007 at Duisburg, Germany

Proceedings: RFID SysTech 2007

Pages: 4Language: englishTyp: PDF

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Authors:
Vaz, Alexander; Ubarretxena, Aritz; Pardo, Daniel; Sancho, Iñaki; Berenguer, Roc (NN)

Abstract:
The main challenge in a full passive long range RFID tag is operating at high reading distances. The current work shows the main constraints that a RFID system presents. Two of these constraints depend on the Voltage Multiplier. So its critical design makes the Voltage Multiplier methodology presented in this paper very attractive in order to obtain the maximum communication range.