High-Gain On-Chip Antennas for LSI Intra-/Inter-Chip Wireless Interconnection
Conference: EuCAP 2009 - 3rd European Conference on Antennas and Propagation
03/23/2009 - 03/27/2009 at Berlin, Germany
Proceedings: EuCAP 2009
Pages: 5Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Kimoto, K.; Sasaki, N.; Kubota, S.; Moriyama, W.; Kikkawa, T. (Research Institute for Nanodevice and Bio Systems, Hiroshima University, 1-4-2 Kagamiyama, Higashi-hiroshima, Hiroshima 739-8527, Japan)
A wireless interconnection technology using on-chip antennas has been proposed for three dimensional packaging of LSI chips. The issues of on-chip antennas are extremely low gain due to lossy Si substrates. In this study, we developed a high gain on-chip antenna structure by thinning the Si substrate thickness and optimizing interposer thickness underlying the Si substrate. The transmission coefficient increased from -93 dB to -31 dB at the distance of 20 mm for inter-chip communication between 180 nm CMOS chips.