Electron beam inspection methods for imprint lithography at 32 nm
Conference: EMLC 2009 - 25th European Mask and Lithography Conference
01/12/2009 - 01/15/2009 at Dresden, Germany
Proceedings: EMLC 2009
Pages: 9Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Selinidis, Kosta; Thompson, Ecron; Sreenivasan, S. V.; Resnick, Douglas J. (Molecular Imprints, Inc., 1807 West Braker Lane, Austin, TX 78758)
Step and Flash Imprint Lithography redefines nanoimprinting. This novel technique involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed leaving a patterned solid on the substrate. Compatibility with existing CMOS processes requires a mask infrastructure in which resolution, inspection and repair are all addressed. The purpose of this paper is to understand the limitations of inspection at half pitches of 32 nm and below. A 32 nm programmed defect mask was fabricated. Patterns included in the mask consisted of an SRAM Metal 1 cell, dense lines, and dense arrays of pillars. Programmed defect sizes started at 4 nm and increased to 48 nm in increments of 4 nm. Defects in both the mask and imprinted wafers were characterized scanning electron microscopy and the measured defect areas were calculated. These defects were then inspected using a KLA-T eS35 electron beam wafer inspection system. Defect sizes as small as 12 nm were detected, and detection limits were found to be a function of defect type.