Analysis of transistor circuits having multiple DC solutions with the thermal constraint
Conference: ISTET 2009 - VXV International Symposium on Theoretical Engineering
06/22/2009 - 06/24/2009 at Lübeck, Germany
Proceedings: ISTET 2009
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Tadeusiewicz, Michal; Halgas, Stanislaw (Technical University of Lodz)
The paper is devoted to the analysis of transistor circuits having multiple DC solutions and offers an algorithm for finding all the solutions. The algorithm can be applied directly to the circuits with constant parameters, when the chip is at fixed temperature or it can be introduced into the procedure enabling us to take into account the thermal behavior of the chip. It exploits a new contraction and elimination method developed in this paper. The proposed algorithm is efficient and improves the analysis of the circuits having multiple DC solutions. It is illustrated via two numerical examples.