Silicon Lateral Avalanche Photodiodes Fabricated by Standard 0.18 µm CMOS Process

Conference: ECOC 2009 - 35th European Conference on Optical Communication
09/20/2009 - 09/24/2009 at Vienna, Austria

Proceedings: ECOC 2009

Pages: 2Language: englishTyp: PDF

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Iiyama, Koichi; Takamatsu, Hideki; Maruyama, Takeo (School of Electrical and Computer Engineering, Kanazawa University, Japan)

A Si APD was fabricated by standard 0.18 µm CMOS process. The maximum avalanche gain was 224 for only 8 V bias. The bandwidth was 1.6 GHz for low avalanche gain and 800 MHz for large avalanche gain.