25 Gbps EML TOSA Employing Novel Impedance-Matched FPC Design
Conference: ECOC 2009 - 35th European Conference on Optical Communication
09/20/2009 - 09/24/2009 at Vienna, Austria
Proceedings: ECOC 2009
Pages: 2Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Uesugi, Toshitsugu; Okada, Norio; Sugitatsu, Atsushi (Information Technology R&D Center, Mitsubishi Electric Corporation, 5-1-1, Ofuna, Kamakura, Kanagawa 247-8501, Japan)
Saito, Takeshi; Yamatoya, Takeshi; Morita, Yoshimichi (High Frequency & Optical Device Works, Mitsubishi Electric Corporation, 4-1, Mizuhara, Itami, Hyogo 664-8641, Japan)
25 Gbps EML TOSA employing novel impedance-matched flexible printed circuit design realizes 30 GHz 3-dB bandwidth and a low-jitter optical waveform with 39 % mask margin for 100 Gbps Ethernet applications.