High Sensitive Clock Recovery for a 160Gbit/s OTDM Signal by Optoelectronic Phase-Locked Loop Technique

Conference: ECOC 2009 - 35th European Conference on Optical Communication
09/20/2009 - 09/24/2009 at Vienna, Austria

Proceedings: ECOC 2009

Pages: 2Language: englishTyp: PDF

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Takasaka, Shigehiro; Mimura, Yu; Yagi, Takeshi (FITEL Photonics Laboratory, The Furukawa Electric Co., Ltd., 6, Yawata-kaigandori, Ichihara, Chiba, Japan)

We demonstrate high sensitive clock recovery for a 160Gbit/s OTDM signal realized by an optoelectronic phase-locked loop with new configuration. The recovered 10GHz clock has timing jitter of 101fs for -9.7dBm signal input.