Basic design challenges for logical gates using non-standard technologies or circuit concept approaches
Conference: Zuverlässigkeit und Entwurf - 3. GMM/GI/ITG-Fachtagung
09/21/2009 - 09/23/2009 at Stuttgart, Germany
Proceedings: Zuverlässigkeit und Entwurf
Pages: 2Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Amar, Ahmed (IMMS gGmbH, Erfurt, Germany)
Glauert, Wolfram H. (LZS Uni. Erlangen-Nürnberg, Erlangen, Germany)
Looking at IGFETs in upcoming technologies like (extremely) deep submicron technologies and organic semiconductors, it is no longer granted that simple digital circuits can be designed easily which are usable as building blocks, like gates and flip-flops. Although transistor characteristics may at first look all right, but only when sizing a circuit it may turn out that the basic functionality is not achievable, e.g. DC transfer characteristics show inadequate gain and poor high- and low-levels. This work shows a method how to prove the adequacy of the available transistors for digital ICs.