Observation of chip solder degradation by electrical measurements during power cycling
Conference: CIPS 2010 - 6th International Conference on Integrated Power Electronics Systems
03/16/2010 - 03/18/2010 at Nuremberg, Germany
Proceedings: CIPS 2010
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Hartmann, Samuel; Bayer, Martin; Schneider, Daniel; Feller, Lydia (ABB Switzerland Ltd., Semiconductors, Lenzburg, Switzerland)
IGBT power modules used in traction applications undergo large load variations. Thermo-mechanically induced stress then leads to material fatigue which limits the module’s lifetime. In this paper a method is presented for non-destructively quantifying the chip solder degradation during a power cycling experiment. The method is based on measuring the cooling rate after turn-off. A 20% increase in the chip solder thermal resistance has been measured after 1’800’000 cycles from 73deg C to 127deg C junction temperature. The solder degradation is also analysed using X-ray inspection and scanning acoustic microscopy. Based on these images and the simulated stress profile in the solder, two failure mechanisms have been identified.