Power Circuit design for clean switching
Conference: CIPS 2010 - 6th International Conference on Integrated Power Electronics Systems
03/16/2010 - 03/18/2010 at Nuremberg, Germany
Proceedings: CIPS 2010
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Bayerer, Reinhold; Domes, Daniel (Infineon Technologies AG, Max-Planck-Str. 5, 59581 Warstein, Germany)
Power circuit design has a strong impact on switching characteristics of power semiconductors and current sharing of paralleled devices. Optimum circuit design, which means minimum parasitic inductance, allows improving power semiconductors towards lower losses. For paralleled devices it ensures symmetric losses and minimum deterioration of drive signals. Effective rules for circuit design lead to power module concepts and an integral solution for power circuits. The resulting switching characteristics show extremely low voltage spikes and oscillation free switching. This new concept also results is a breakthrough in EMI.