Fast Extraction of Dynamic Thermal Impedance for Multi-Chip Power Modules

Conference: CIPS 2010 - 6th International Conference on Integrated Power Electronics Systems
03/16/2010 - 03/18/2010 at Nuremberg, Germany

Proceedings: CIPS 2010

Pages: 6Language: englishTyp: PDF

Personal VDE Members are entitled to a 10% discount on this title

Evans, Paul; Johnson, C. Mark (University of Nottingham, Nottingham, UK)

A novel method for the extraction of the dynamic thermal impedance models of multi-chip power modules is presented. The method described is a fast, accurate approach based on the GMRES algorithm that extracts dynamic thermal impedance expressions without the need for curve fitting to finite-element or experimental data. The method is applied to an example half-bridge multi-chip power module. It is shown that dynamic thermal impedance can be constructed using the dominant eigenvalues of the finite-difference matrices and these eigenvalues can be obtained from a reduced order system model available from GMRES. The models generated are compared against finite element data and a traditional curve fit models produced from the FEM results.