Dynamic Frequency Scaling for MPSoCs based on Chaotic Workload Analysis
Conference: ARCS 2010 - 23th International Conference on Architecture of Computing Systems
02/22/2010 - 02/23/2010 at Hannover, Germany
Proceedings: ARCS 2010
Pages: 8Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Zompakis, Nikolaos; Bartzas, Alexandros; Soudris, Dimitrios (ECE School, National Technical University of Athens, 15780 Zografou, Greece)
Tsoutsouras, Vasileios; Pavlos, Georgios (ECE Department, Democritus University of Thrace, 67100 Xanthi, Greece)
Modern applications running on Multi-Processor Systems-on-Chip vary their workload dynamically. This gives the opportunity to the designers to perform dynamic frequency scaling (DFS). Thus the system adapts to the workload requirements of the application and increases its power efficiency. In this work, we present a DFS technique based on the workload trend of a dynamic application. The designer can adjust the frequency of the system by analyzing the workload fluctuations without degrading the final performance or violating any deadlines. To achieve this we employ an abstract model of workload analysis that combines advanced mathematical tools from the Chaos Theory domain, allowing us to handle dynamic data streams with complex behavior. To evaluate the efficiency of the proposed approach we applied it using a workload from a real application on a cycle-accurate Network-on-Chip simulation framework. The simulation results showed that the proposed technique can achieve remarkable improvements at the final power consumption, between 17.5% and 37.8%, depending on the system constraints.