A Holistic Approach of an Architecture for Tests of FPGA Based Systems with Boundary Scan
Conference: Zuverlässigkeit und Entwurf - 4. GMM/GI/ITG-Fachtagung
09/13/2010 - 09/15/2010 at Wildbad Kreuth, Germany
Proceedings: Zuverlässigkeit und Entwurf
Pages: 2Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Sachße, Jörg; Ostendorff, Steffen; Wuttke, Heinz-Dietrich; Meza Escobar, Jorge Hernán (Technische Universität Ilmenau, FG Integrierte Kommunikationssysteme, PF 10 05 65, 98684 Ilmenau, Germany)
This paper describes an approach of boundary scan emulation based testing for failure diagnostics using programmable logic available on-board. The motivation to speed up boundary scan based testing as well as the approach for this new concept is presented. With this approach boundary scan testing can be extended and fastened. The new options and benefits, as well as the necessary fundamentals are indicated.