Scalable High Performance Development Rack for Power Electronics
Conference: EMA 2010 Elektromobilausstellung - Fachtagung - Wettbewerbe
10/08/2010 - 10/09/2010 at Aschaffenburg, Germany
Proceedings: EMA 2010 Elektromobilausstellung
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Schulz, Martin; Brockerhoff, Philip (Universität der Bundeswehr, Werner-Heisenberg-Weg 39, 85577 Neubiberg, Germany)
Hohmuth, Maik (BITSz engineering GmbH, Newtonstraße 12, 08060 Zwickau, Germany)
The development of new power electronic topologies requires a flexible, free programmable and scalable control unit. Efficient debugging and a graphical user interface are additional requirements. Especially the number and specification of A/D channels or PWM channels changes for every topology and normally enforces a specific electronic development. Galvanic isolation between control area and power stack is very important, to reduce the EMI. The capacitive couplings due to parasitics of the auxiliary sensor power supply are avoided. Key points for development rack are: (1) free scalable resolution and speed of the A/D part by Δ Σ modulation; (2) very fast parallel A/D conversions; (3) galvanic isolation by strictly fiber optic communication; (4) time critical processing power with a Field Programmable Array (FPGA); (5) high power fixed point calculation with a Digital Signal Processor (DSP); (6) shared memory for DSP and FPGA for easy data communication; (7) graphical user interface with LabView; (8) debug features with parallel; (9) analogue output channels and safety features for overcurrent and overvoltage protection. The system can be simply adapted to new topologies for electric drives and multilevel converters in different power ranges. New control algorithms can be easily implemented without hard limitations in computing power or timing constraints.