High-Speed and Low-Power Static Frequency Divider and Decision Circuit with 0.5-?m-emitter-width InP HBTs
Conference: IPRM 2011 - 23th International Conference on Indium Phosphide and Related Materials
05/22/2011 - 05/26/2011 at Berlin, Germany
Proceedings: IPRM 2011
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Bouvier, Y.; Nagatani, M.; Sano, K.; Murata, K.; Kurishima, K.; Ida, M. (NTT Photonics Laboratories, NTT Corporation, 3-1 Morinosato Wakamiya, Atsugi-shi, Kanagawa, Japan)
A static frequency divider and decision circuit have been designed and fabricated in a 290-GHz-fT InP HBT technology. The static frequency divider operates up to 70 GHz with core power consumption as low as 19.6 mW. The decision circuit, realized with a parallel-clock structure, achieves error-free operation up to 50 Gbps with power consumption of 142 mW. Both speed/power ratios are among the highest in over-50-GHz applications. These results demonstrate the suitability of this technology for high-speed and low-power applications.