Preliminary results of storage accelerated aging test on InP/GaAsSb DHBT
Conference: IPRM 2011 - 23th International Conference on Indium Phosphide and Related Materials
05/22/2011 - 05/26/2011 at Berlin, Germany
Proceedings: IPRM 2011
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Koné, G. A.; Ghosh, S.; Grandchamp, B.; Maneux, C.; Marc, F.; Labat, N.; Zimmer, T. (IMS, Université Bordeaux 1, 351 cours de la libération, 33405 Talence, France)
Maher, H.; Bourqui, M. L.; Smith, D. (OMMIC, 2 Chemin du Moulin BP 11, 94453 Limeil-Brévannes Cedex, France)
The reliability of InP/GaAsSb/InP DHBTs designed for very high-speed ICs applications is studied after storage accelerated aging tests performed up to 2000 hours at ambient temperatures of 180, 210 and 240deg C. The HiCuM model was used for modelling DC electrical characteristics measured during aging tests. The signature of the major degradation mechanism points out an evolution of the emitter access resistance. The failure mechanism is related to the Au and/or Ti diffusion into InGaAs emitter contact layer. However, the maximum current gain decrease is lower than 7% after 2000 hours at 240deg C. This shows the robustness of the InP/GaAsSb/InP DHBT under test.