Reduction of Thermal Imbalances and Hot Spots in Networks-on-Chip Using Proactive Temperature Management
Conference: Zuverlässigkeit und Entwurf - 5. GI/GMM/ITG-Fachtagung
09/27/2011 - 09/29/2011 at Hamburg-Harburg, Deutschland
Proceedings: Zuverlässigkeit und Entwurf
Pages: 8Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Wegner, Tim; Gag, Martin; Timmermann, Dirk; Uhrmacher, Adelinde (Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Richard-Wagner-Str. 31, 18119 Rostock-Warnemünde, Germany)
With the progress of deep submicron technology power consumption and temperature related issues have become two of the most critical aspects for chip design. Therefore, very large-scale integrated systems like Systems-on-Chip (SoCs) are exposed to an ever increasing thermal stress. This necessitates effective mechanisms for thermal management. In this paper we propose to precompute and proactively manage onchip temperature of systems based on Networks-on-Chip (NoCs). Thereby, traditional reactive approaches, utilizing the NoC interconnect infrastructure to perform thermal management, can be replaced. For this purpose, an existing simulation environment for NoC-based systems is enhanced with mechanisms to predict and proactively manage on-chip temperature distribution. Simulations show that proactive thermal management achieves improvements of more than 95% and 80% regarding reduction of temperature imbalances as well as peak temperatures inside a 4x4 NoC compared to identical reactive approaches.