An advanced VHDL/IP-core for embedded aging monitoring of analog and mixed signal applications in sensitive radiation environments
Conference: ANALOG '11 - 12. GMM/ITG-Fachtagung
11/07/2011 - 11/09/2011 at Erlangen, Deutschland
Proceedings: ANALOG '11
Pages: 5Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Schmid, Josef; Rauch, Hans (iSyst Intelligente Systeme GmbH, Nürnberg, Deutschland)
Li, Hongzhi; Munninger, Peter; Schmidt, Georg (eesy-id GmbH, Gräfelfing, Deutschland)
In this article a digital IP core for robust design and aging monitoring in sensitive radiation environments will be addressed. It can be implemented in digital, analog and mixed signal embedded systems for detecting accelerated aging effects due to TID (Total Ionization Dose). By using TMR (triple modular redundancy) technology, this IP core concept can be applied to recover the SEU (single event upsets) errors. Moreover, a ring oscillator structure is introduced in this IP core so that the aging effect of the device can be tested and evaluated, which is also verified by our on-field testing. The customized controlling interface is easy to be connected with any standard interface (e.g. a JTAG or I2C interface) so that the sampled error information can be shifted out and analyzed off-line.