Design and Implementation of Fast SAR Echo Simulation Based on FPGA
Conference: EUSAR 2012 - 9th European Conference on Synthetic Aperture Radar
04/23/2012 - 04/26/2012 at Nuremberg, Germany
Proceedings: EUSAR 2012
Pages: 4Language: englishTyp: PDF
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Authors:
Peng, Qi; Zhang, Wei; Zong, Zhu Lin (University of Electronic Science and Technology of China, China)
Abstract:
Synthetic Aperture Radar (SAR) echo simulation needs massive calculation and takes much time. In order to simulate SAR echo quickly, this paper presents a method of fast SAR echo simulation which is based on an improved equivalent scatterer echo algorithm, A hardware-in-Ioop SAR echo simulator with flexible configuration is designed. FPGA-based parallel realization is optimized. The application result shows that the SAR echo simulator can generate high-accuracy echo data and the speed of echo simulation is increased significantly.