Asymmetrical Parasitic Inductance Utilized for Switching Loss Reduction in Power Modules
Conference: CIPS 2012 - 7th International Conference on Integrated Power Electronics Systems
03/06/2012 - 03/08/2012 at Nuremberg, Germany
Proceedings: CIPS 2012
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Frisch, Michael (Vincotech GmbH, Biberger Str. 93, 82008 Unterhaching, Germany)
Ernö, Temesi (Vincotech Kft., Kossuth Lajos u. 59, 2060 Bicske, Hungary)
High efficiency of power conversion circuits is a design goal on its own. At the top end competing solar inverter manufacturer to develop the most efficient topologies using components with the lowest power dissipation. But high efficiency is also the key for other approaches. The reduction of switching losses is the basis for higher switching frequencies which lead to a reduction of the size and weight of the passive components. The improvement from 96% to 99% efficiency will reduce the effort for cooling by factor four. It is obvious that high efficient circuits are the smartest way to achieve compact design and highest power density. With the utilization of parasitic inductance and consequent execution of basic rules of power electronics is a new power electronics solution based on standard Si components disclosed which extends the traditional designs. The presented new power module concept combines a low inductive turn off with the utilization of the parasitic inductance for a reduction of the turn on losses and the usage of three level switching circuits with the paralleling of fast switching components with components with low forward voltage drop.