Design of a 5bit 1GSps VCO Quantizer for a CT Δ Σ Modulator
Conference: PRIME 2012 - 8th Conference on Ph.D. Research in Microelectronics & Electronics
06/12/2012 - 06/15/2012 at Aachen, Germany
Proceedings: PRIME 2012
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Kauffman, John G.; Rieger, Viola; Ritter, Rudolf; Anders, Jens; Ortmanns, Maurits (Institute of Microelectronics, University of Ulm, Ulm, Germany)
This paper presents the design of a 5 bit VCO quantizer with an alternative flipped cross-coupled delay element providing low KV nonlinearities compared to the commonly used current starved inverter delay element. The VCO is demonstrated within a third order continuous time (CT) δ σ (?Σ) modulator operating at an fS of 1 GHz with an OSR of only 10 . In using the frequency output of the VCO, fourth order noise shaping is present but with the stability of a third order multi-bit loop-filter. The schematic based VCO achieves a 50 dB linearity and 44.5 dB SNDR within a 50MHz bandwidth (BW) which provides 73.5 dB SNDR performance of the third order modulator with a frequency output VCO quantizer.