A Mixed-Signal Front-End ASIC for EEG Acquisition System
Conference: ANALOG 2013 - Entwicklung von Analogschaltungen mit CAE-Methoden - Vorträge der 13. ITG/GMM-Fachtagung
03/04/2013 - 03/06/2013 at Aachen, Deutschland
Proceedings: ANALOG 2013 - Entwicklung von Analogschaltungen mit CAE-Methoden
Pages: 5Language: englishTyp: PDF
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Authors:
Zhou, Haiyan; Voelker, Matthias; Hauer, Johann (Fraunhofer IIS, Am Wolfsmantel 33, 91058 Erlangen, Germany)
Abstract:
In this paper a mixed-signal front-end ASIC for an Electroencephalogram (EEG) acquisition system is presented. It will be applied to detect the electrical signals from the brain, amplifies them, and converts the signals into digital data. Eight EEG channels are integrated. The gain of each channel can be individually set to four stages 10/100/1000/10000 by a combination of 2 stage gain selection (10/1000) in the pre-amplifier and further two step selection (1/10) in the following SC-lowpass. The second stage lowpass filter has a selectable bandwidth of 80 Hz and 800 Hz. The whole channel has a simulated input referred noise of 2.2 muVrms for a signal bandwidth of 1 Hz - 1 kHz. The analog to digital converter (ADC) is based on successive approximation algorithm with a resolution of 12 bit. The whole ASIC consumes 6.03 mW from 1.8 V supply and occupies 7.15 mm2 in 180 nm CMOS technology. The prototype is currently under evaluation. All functions are verified. For the test of final performance a specialized test board must be developed. Index Terms: EEG acquisition, low input referred noise, multi-channel, pre-amplifier with offset compensation, SAR ADC