Fault Tolerance and Self Repair Using a Virtual TMR Scheme

Conference: Zuverlässigkeit und Entwurf - 7. ITG/GI/GMM-Fachtagung
09/24/2013 - 09/26/2013 at Dresden, Deutschland

Proceedings: Zuverlässigkeit und Entwurf

Pages: 4Language: englishTyp: PDF

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Authors:
Koal, T.; Ulbricht, M.; Vierhaus, H. T. (Brandenburgische Technische Universität Cottbus-Senftenberg, Technische Informatik, Deutschland)

Abstract:
With decreasing minimum feature size, nano-electronic circuits and systems exhibit an increasing variety of defect and fault mechanisms. Their rising sensitivity to radiation- and coupling induced single and multiple event upsets is one problem, new or enhanced aging processes that may lead to early-lifetime failures pose another threat. The compensation of transient fault effects is a well explored area of science, while repair technologies that tackle permanent faults have so far found a broad acceptance only for embedded memories and for FPGA-based systems. This paper describes a scheme of fault detection and on-line error correction, based on a virtual triple modular redundancy (TMR) scheme that is favorably compatible with a scheme for built- in self repair at reasonable total cost.