System Level Design Flow of CMOS Based Fully Integrated Envelope Tracking Modules for Power Amplifiers Targeting 4G LTE
Conference: GeMiC 2014 - German Microwave Conference
03/10/2014 - 03/12/2014 at Aachen, Germany
Proceedings: ITG-Fb. 246: GeMiC 2014
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Khan, Muhammad Abdullah; Negra, Renato (Chair of High Frequency Electronics, RWTH Aachen University, 52056 Aachen, Germany)
Envelope Tracking (ET) system in itself is a complicated system comprising of many small sub-blocks. In this paper, we present a systematic design flow for designing an ET system and analyse some important aspects of implementation in bulk CMOS technology. Three tier ET system is introduced for analysis and respective simulation results are produced using SpectreRF(r).