A Gateway Core between On-chip and Off-chip Networks for an AUTOSAR Message-based Multi-core Platform

Abstract:
The instantiation of the AUTOSAR architecture on a message-based Multi-Processor System-on-Chip (MPSoC) platform allows to realize the advantages of NoC architectures in an AUTOSAR system. The TIme-triggered MEssage-based MPSoC platform for AUTOSAR (TIMEA) presents application cores as autonomous virtual AUTOSAR ECUs that act as meaningful units of abstraction with freedom of inference from other cores. Additionally, the TIMEA platform provides the possibility to replace functionalities of the Basic Software (BSW) by stubs to dedicated system cores which serve as hardware accelerators to the virtual ECUs. This papers presents a system core supporting the communication between on-chip and off-chip networks for the TIMEA platform. The mentioned system core works as a gateway used by the virtual ECUs for the exchange of messages with virtual ECUs located on a different MPSoC. The gateway core is implemented in a simulation environment which supports the simulation of the AUTOSAR-based software, the natural environment and the on/off-chip network communication. A realistic test application is used for its evaluation.