Characterization and analysis of an innovative gate driver and power supplies architecture for HF power devices in harsh environment

Abstract:
This paper presents a specific architecture for low side/high side gate driver implementation for medium voltage very high switching frequencies power devices. EMI optimization is managed by minimizing the parasitic capacitance propagation paths between power and control sides by a specific circuit design. Moreover, to reduce the parasitic inductances and minimize the antenna phenomenon, the paper analysis which parts of the drivers’ circuitry must be brought as close as possible to the power parts where the ambient temperature become critical, in automotive and aeronautic applications for instance. Simulations and experiments validate the advantages of the proposed architecture on the conducted EMI problem.