Wafer-level manufacturing and optimization of CNT-based field-effect transistors
Conference: Mikro-Nano-Integration - 6. GMM-Workshop
10/05/2016 - 10/06/2016 at Duisburg, Deutschland
Proceedings: Mikro-Nano-Integration
Pages: 4Language: englishTyp: PDF
Personal VDE Members are entitled to a 10% discount on this title
Authors:
Tittmann-Otto, Jana; Hartmann, Martin (TU Chemnitz, Center for Microtechnologies, Chemnitz, Germany & TU Dresden, Center for Advancing Electronics Dresden (cfaed), Dresden, Germany)
Schulz, Stefan E.; Hermann, Sascha (TU Chemnitz, Center for Microtechnologies, Chemnitz, Germany & TU Dresden, Center for Advancing Electronics Dresden (cfaed), Dresden, Germany & Fraunhofer Institute for Electronic Nano Systems (ENAS), Chemnitz, Germany)
Abstract:
We report on the development and improvement of fabrication procedures to fabricate carbon nanotube-based field-effect transistors at large scale. Special attention is paid to the statistical evaluation of post-process treatments to reliably eval-uate the transistor performance. An experimental study is presented which aims the removal of surfactant residues by applying wet chemical and thermal post-treatments. The effect on the CNTs and transistors are monitored by atomic force microscopy, X-ray photoelectron spectroscopy, Raman spectroscopy and electrical measurements on transistor arrays. HNO3 and H2O based treatments result in improvement of on-currents, whereas an annealing changes the direction of the hysteresis in transfer characteristics.