Optimization of opposing phased looked loop parameters in UHF RFID systems

Abstract:
This paper presents an optimization of the phased locked loop (PLL) behaviour based on the basic parameter look-in time, inband phase noise floor and spurs suppression. The PLL can be used as a local oscillator for RFID reader systems working in the American and European UHF ISM band. The main design object for a local oscillator lies in a robust PLL behaviour on the one hand and a low lock-in time and phase noise behaviour on the other hand. Therefor a trade-off of the above mentioned basic parameters must be achieved. The approach of the presented optimization comprises an optimization of the local oscillator behaviour by designing a PLL for a multiple (n-fold, for integer values of n) of the used carrier frequency and subsequently an n-fold reduction of the PLL frequency to the local oscillator frequency. Using the approach leads to an optimization of the lock-in behaviour on the one hand and a reduction of the inband phase noise floor on the other hand at the same time. The fundamental part will show the basic equations for the calculation of the used optimisation effect. The later presented measurement results will show a solution for the enhancement of all opposing parameters by an overall usability in later 200 kHz channel spacing.