Fabrication and Characterization of a High-Power-Density, Planar 10 kV SiC MOSFET Power Module

Conference: CIPS 2018 - 10th International Conference on Integrated Power Electronics Systems
03/20/2018 - 03/22/2018 at Stuttgart, Deutschland

Proceedings: ETG-Fb. 156: CIPS 2018

Pages: 6Language: englishTyp: PDF

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Authors:
DiMarino, Christina; Lu, G. Q.; Boroyevich, Dushan; Burgos, Rolando (Virginia Tech, USA)
Johnson, Mark; Mouawad, Bassem; Li, Jianfeng; Skuriat, Robert (University of Nottingham, Unit Kingdom)
Wang, Meiyu; Tan, Yansong (Tianjin University, China)

Abstract:
High-power-density packaging of fast-switching power semiconductors typically requires low thermal resistance and low parasitic inductance. High-power-density packaging of 10 kV SiC MOSFETs has the added challenge of maintaining low electric fields in order to prevent premature dielectric breakdown. This work proposes a wire-bond-less, planar structure with embedded decoupling capacitors and stacked ceramic substrates to realize a high-density power module capable of high-speed switching with low electric fields. This is the first time that these advanced packaging techniques have been applied to a 10 kV SiC MOSFET module. The module has power- and gate-loop inductances of 4.4 nH and 3.8 nH and a power density of 18.1 W/mm(Exp 3).