On-line Parameter Extraction Technique for Integrated Circuits
Conference: ANALOG 2018 - 16. GMM/ITG-Fachtagung
09/13/2018 - 09/14/2018 at München/Neubiberg, Deutschland
Proceedings: GMM-Fb. 91: ANALOG 2018
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Hillebrand, Theodor; Tscherkaschin, Konstantin; Paul, Steffen; Peters-Drolshagen, Dagmar (University of Bremen, Germany)
In this paper an on-line monitoring setup based on sequential importance is presented. The algorithm is used to observe and distinguish between process, temperature and voltage variations affecting integrated circuits. This tasks commonly occur within reliability assessments. The method is presented at the example of an 65nm CMOS reference voltage source and evaluated with measurement data thereof. The method is capable of compensating environmental influences, such as temperature and supply voltage, during measurements and can be used to analyze the circuit behavior while exposed to arbitrary mission and stress profiles.