Novel back-end-of-line compatible method for integration of inductances with magnetic core on silicon

Conference: CIPS 2020 - 11th International Conference on Integrated Power Electronics Systems
03/24/2020 - 03/26/2020 at Berlin, Deutschland

Proceedings: ETG-Fb. 161: CIPS 2020

Pages: 6Language: englishTyp: PDF

Paesler, Malte; Lisec, Thomas; Kapels, Holger (Fraunhofer Institute for Silicon Technology ISIT, Fraunhoferstr. 1, 25524 Itzehoe, Germany)

In high frequency applications like power supplies, the integration of active and passive components on a single chip is necessary to increase the power density. A novel approach for the integration of micro-inductances with a magnetic core on silicon substrates is presented. This paper shows development, processing and investigation of different samples, having a magnetic core of 3:4mm x 1mm x 0:6mm in size. At 20MHz inductances of 150 nH are reached, whereas the resistance is about 0:66W. The fabrication technique is based on the agglomeration of micron-sized magnetic powder by atomic layer deposition (ALD). The process is fully back-end-of-line (BEOL) compatible and offers a wide range of magnetic materials, which can be integrated on the substrate in any desired geometry of the core. This enables a lot of possibilities for the integration and design of inductors.