Multi-chip Medium Voltage SiC MOSFET Power Module with Focus on Low Parasitic Capacitance

Conference: CIPS 2020 - 11th International Conference on Integrated Power Electronics Systems
03/24/2020 - 03/26/2020 at Berlin, Deutschland

Proceedings: ETG-Fb. 161: CIPS 2020

Pages: 6Language: englishTyp: PDF

Jorgensen, Jannick K.; Dalal, Dipen Narendra; Beczkowski, Szymon; Munk-Nielsen, Stig; Uhrenfeldt, Christian (Aalborg University, Aalborg, Denmark)

Advances in high breakdown voltage SiC MOSFETs is enabling the use of simpler topologies, such as a half-bridge in medium voltage applications. In order to increase the power output it is necessary to parallel multiple MOSFETs, which can be done in power modules. At high voltage operating conditions parasitic capacitances of the power module become increasingly important to consider, due to increased switching losses and increased risk to cause EMI. A 10 kV, 80 A half-bridge design is presented using four MOSFETs in parallel, with a design focus on minimal parasitic capacitances.