Reduction of Common Mode EMI noise in microstrip line based commutation paths designed for sub-nH loop inductance

Conference: CIPS 2020 - 11th International Conference on Integrated Power Electronics Systems
03/24/2020 - 03/26/2020 at Berlin, Deutschland

Proceedings: ETG-Fb. 161: CIPS 2020

Pages: 6Language: englishTyp: PDF

Seliger, Norbert; Dechant, Eduard (Technical University of Applied Sciences Rosenheim, Rosenheim, Germany)
Brendel, Christian (DR. JOHANNES HEIDENHAIN GmbH, Traunreut, Germany)
Kennel, Ralph (Technical University Munich, Munich, Germany)

We present a numerical and experimental design study for reducing conducted common mode noise for frequencies below 10MHz generated in switching cells comprising sub-nH commutation loops. Compared to conventional methods of adding external gate resistors our approach does not degrade efficiency. A parallel plate loop design (characterized by a minimum loop inductance and small board area usage) is found suboptimal in terms of conducted EMI compared to a micro-strip line loop geometry. The net ground impedance rather than the net ground inductance is found to mainly contribute to the observed EMI noise.