Influence of Non-Stoichiometric Silicon Nitride Layer Thickness on Electrical Properties and Manufacturability of 900 V Silicon RC-Snubbers
Conference: CIPS 2022 - 12th International Conference on Integrated Power Electronics Systems
03/15/2022 - 03/17/2022 at Berlin, Germany
Proceedings: ETG-Fb. 165: CIPS 2022
Pages: 4Language: englishTyp: PDF
Authors:
Becker, Tom; Boettcher, Normen (Fraunhofer Institute for Integrated Systems and Device Technology IISB, Erlangen, Germany)
Erlbacher, Tobias (Fraunhofer Institute for Integrated Systems and Device Technology IISB, Erlangen, Germany & Friedrich-Alexander-University Erlangen-Nuremberg, Chair of Electron Devices, Erlangen, Germany)
Abstract:
In this paper, we present a study focusing on the layer thickness of non-stoichiometric, silicon-rich silicon nitride in the dielectric layer stack of a Si RC-Snubber technology. We refer to a technology, which utilizes trench structures and low-stress silicon nitride in order to increase both dielectric breakdown strength and integration density for MNOS capacitors. By varying the ratio of low-stress silicon nitride and stoichiometric silicon nitride, while maintaining the overall dielectric stack thickness, superior electrical properties are achieved. The design of experiment covers low-stress to stoichiometric silicon nitride layer ratios in a range from 1:3 to 1:30. Following this approach, RC-Snubber devices are fabricated exhibiting capacitance density values of 31 nF/cm2 and leakage current density values of under 0.2 muA/cm2 at 1200 VDC. These results represent a reduction of leakage current by a factor of up to 300, compared to preceding approaches of similar integration densities.