Analysis of Continuous Time Cascaded Σ Δ Modulators

Conference: ANALOG '05 - 8. GMM/ITG-Diskussionssitzung: Entwicklung von Analogschaltungen mit CAE-Methoden
03/16/2005 - 03/18/2005 at Hannover, Deutschland

Proceedings: ANALOG '05

Pages: 4Language: englishTyp: PDF

Personal VDE Members are entitled to a 10% discount on this title

Samid, Lourans; Kuderer, Markus; Manoli, Yiannos (Chair of Microelectronics, IMTEK, Freiburg, Germany)

This paper discuses the influence of several design parameters like RC-tolerance, clock jitter and implicit antialiasing filter on continuous time cascaded Σ Δ modulator. A novel design of a third order cascaded continuous time Σ Δ modulation will be presented. This architecture represents an attractive approach to implementing precision A/D converters in VLSI technology.