Through-pitch and through-focus characterization of AAPSM for ArF immersion lithography
Conference: EMLC 2006 - 22nd European Mask and Lithography Conference
01/23/2006 - 01/26/2006 at Dresden, Germany
Proceedings: EMLC 2006
Pages: 9Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Konishi, Toshio; Kojima, Yosuke; Okuda, Yoshimitsu (Toppan Printing Co., Ltd., 7-21-33 Nobidome, Niiza-shi, Saitama 352-8562, Japan)
Philipsen, Vicky; Leunissen, Leonardus H. A.; Look, Lieve Van (IMEC vzw, Kapeldreef 75, 3001 Leuven, Belgium)
Alternating Aperture Phase Shift Mask (AAPSM) is one of the most effective approaches to improve the resolution of logic gate structures for ArF lithography of the 65nm half-pitch node and beyond because AAPSM shows good performance due to the high image contrast and the small mask error enhancement factor (MEEF). For AAPSM, the issue of intensity imbalance between π-space and zero-space is well known. In order to solve this issue, several kinds of AAPSM, such as single trench with undercut, single trench with bias are used in production application. The fabrication of single trench with bias AAPSM requires that the quartz dry etch satisfies many conditions. The etched quartz features must not only show excellent depth uniformity but also good etch depth linearity across a wide range of feature sizes. However, in defocus conditions, the through-pitch image placement error becomes worse even with good quartz etch depth linearity. The reason is that the phase error caused by mask topography is different depending on the pitch. In this work, we minimize the phase error through-pitch and through-focus by rigorous 3D mask simulations. Based on the results, we have fabricated two masks with opposite quartz depth linearity signatures to estimate the imaging impact of phase errors and used them for exposures on an ASML XT:1250Di immersion scanner. We discuss the feasibility of this method by comparison of through-focus and through-pitch image placement errors between wafer printing, AIMS, and simulation.