A Digital Intermediate Frequency Demodulator for π/4 DQPSK based on Hard Limiter
Conference: PIMRC 2005 - 16th Annual IEEE International Symposium on Personal Indoor and Mobile Radio Communications
09/11/2005 - 09/14/2005 at Berlin, Germany
Proceedings: PIMRC 2005
Pages: 5Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Qing, Xu Chang; Ping, Li Zhi; Wang Ting Wu,; Gui, Hu Sai; Ren, Tan Kai; Tomisawa, M. (OKI Techno Centre (Singapore) Pte. Ltd, 20 Science Park Road, 02-06, Teletech Park, Singapore Science Park II, Singapore, 117674)
This paper proposes a new digital intermediate frequency (D-IF) demodulation scheme for π/4 differential quadrature phase shift keying (DQPSK) modulation based on hard limiter. After converting the IF signal into a 2-level signal, all following signal processing is implemented in the digital domain. The proposed scheme demonstrates several attractive attributes: Compared with traditional D-IF demodulator, the power consuming and complex analog-to-digital converter (ADC) is not necessary; On the other hand, the scheme outperforms the normal D-IF demodulator based on hard limiter with better bit error rate (BER) performance and lower sampling rate.