Computation of parasitic capacitances of an IC cell in accounting for lithography effect
Conference: CEM 2006 - 6th International Conference on Computational Electromagnetics
04/04/2006 - 04/06/2006 at Aachen, Germany
Proceedings: CEM 2006
Pages: 2Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Ren, Zhuoxiang; Zhang, Weidong; Falbo, Jim (Mentor Graphics Corporation, 1001 Ridder park drive, San Jose, CA 95131, USA)
Today’s sub-wavelength IC design needs the reticle enhancement technology (RET) such as optical proximity correction (OPC) to correct optical distortion due to photolithography effect. However the difference between the drawn layout and the actual print image persists. To accurately predict the interconnect parasitics such as resistances and capacitances, the impact of optical distortion needs to be considered. This paper presents the computation of parasitic capacitances of an IC logical cell in accounting for optical distortion by using a three dimensional field solver. The study offers a better understanding of the impact of optical image on the accuracy of parasitic capacitances and provides an overview for further optical effect modeling and post OPC extraction.