Time and spatial resolved detection of power device failures during wire bonding

Conference: CIPS 2006 - 4th International Conference on Integrated Power Systems
06/07/2006 - 06/09/2006 at Naples, Italy

Proceedings: CIPS 2006

Pages: 4Language: englishTyp: PDF

Personal VDE Members are entitled to a 10% discount on this title

Authors:
Siepe, Dirk; Bayerer, Reinhold (Infineon Technologies AG, Max-Planck-Straße 5, 59581 Warstein, Germany)

Abstract:
Power semiconductor modules with IGBTs (insulated gate bipolar transistor) in a range from 600 V – 6500 V and up to 200 A per chip are connected with heavy wires of up to 500micrometer in diameter. The interconnection between Aluminum wires and semiconductor surfaces plays an important role for reliability. Due to the high thermo-mechanical stress the lifetime is limited by wire material and bonding quality. To reach a good connection and a good yield it is important to optimize the bond process and the layout. In this paper a technique is described, which allows to detect time and location of destruction during wire bonding.