Unifying Mesh and MFPGA architectures to improve performances
Conference: ARCS 2007 - 20th International Conference on Architecture of Computing Systems 2007
03/15/2007 at Zurich, Switzerland
Proceedings: ARCS 2007
Pages: 10Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Marrakchi, Zied; Mrabet, Hayder; Masson, Christian; Mehrez, Habib (Université Pierre et Marie Curie, 75005 Paris, France)
In this paper we present a new clustered mesh FPGA architecture where each cluster local interconnect is implemented as an MFPGA tree network. Unlike previous clustered mesh architectures, the mesh of tree allows us to consider large clusters sizes (thanks to MFPGA depopulated local interconnect). Experimentation shows that we obtain a reduction of 14% in switches number and 2 times in the placement and routing run time. Furthermore, compared to MFPGA, the mesh of tree achieves full routability of all MCNC benchmarks since we can easily control both clusters LUTs occupation and mesh channel width.