Online Strategies for the Reconfiguration of Two-Level Reconfigurable Architectures
Conference: ARCS 2007 - 20th International Conference on Architecture of Computing Systems 2007
03/15/2007 at Zurich, Switzerland
Proceedings: ARCS 2007
Pages: 8Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Lange, Sebastian; Middendorf, Martin (Department of Computer Science, University of Leipzig, Johannisgasse 26, D-04103 Leipzig, Germany)
Dynamically reconfigurable hardware offers promising possibilities for flexible, computation intensive applications. With the technological advance of reconfigurable hardware came a rapid growth in the number of resources per chip requiring large amounts of data transfer per reconfiguration. Especially run time reconfigurable applications, which make frequent use of reconfiguration, suffer from the growing overhead induced thereby. 2-level reconfigurable systems were proposed to reduce the amount of reconfiguration data. At the upper reconfiguration level, the reconfigurable resources that are available for subsequent lower level (ordinary) reconfigurations are determined. A prominent problem for these systems is to decide when and how the reconfiguration potential should be changed in order to minimize the total reconfiguration costs (PHC problem). Solutions to this problem have been given in the literature under the assumption that upper bounds for the reconfigurable resource demand are known in advance for all reconfiguration operations. In this paper, we study the online situation where the demand of reconfigurable resources is only known for a small number of future reconfiguration operations. Several heuristics are presented for the online version of the PHC problem. Empirical results are given where the heuristic solutions are compared to the optimal solution for the static problem. The results show that three heuristics produce very good results even when only a small number (5-10) of future context requirements are known.