Electrical Test Structures for the Characterisation of Optical Proximity Correction

Conference: EMLC 2007 - 23rd European Mask and Lithography Conference
01/22/2007 - 01/26/2007 at Grenoble, France

Proceedings: EMLC 2007

Pages: 9Language: englishTyp: PDF

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Tsiamis, Andreas; Smith, Stewart; Stevenson, J. Tom M.; Waltona, Anthony J. (Institute of Integrated Micro and Nano Systems, School of Engineering and Electronics, Scottish Microelectronics Centre, The University of Edinburgh, Kings Buildings, Edinburgh, EH9 3JF, UK)
McCallum, Martin (Nikon Precision Europe GmbH, Appleton Place, Appleton Parkway, Livingston, West Lothian, EH54 7EZ, UK)
Hourd, Andrew C. (Compugraphics International Ltd., Eastfield Industrial Estate, Glenrothes, Fife, KY7 4NT, UK)

Simple electrical test structures have been designed that will allow the characterisation of corner serif forms of optical proximity correction. The structures measure the resistance of a short length of conducting track with a right angled corner. Varying amounts of OPC can be applied to the outer and inner corners of the feature and the effect on the resistance of the track measured. These structures have been simulated and the results are presented in this paper. In addition a preliminary test mask has been fabricated which has test structures suitable for on-mask electrical measurement. Measurement results from these structures are also presented. Furthermore structures have been characterised using an optical microscope, a dedicated optical mask metrology system, an AFM scanner and finally a FIB system. In the future the test mask will be used to print the structures using a step and scan lithography tool so that they can be measured on-wafer. Correlation of the mask and wafer results will provide a great deal of information about the effects of OPC at the CAD level and the impact on the final printed features.