Influence of the wafer shape on polishing performance for 300 mm prime wafer polishing
Conference: ICPT 2007 - International Conference on Planarization / CMP Technology
10/25/2007 - 10/27/2007 at Dresden, Germany
Proceedings: ICPT 2007
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Langenkamp, M.; Kanzow, J.; Mörsch, G. (Peter Wolters AG, Büsumer Straße 96, D-24768 Rendsburg, Germany)
A state-of-the-art 300 mm silicon prime wafer has a well defined geometry. The thickness variation is well below 1 µm, the typical site flatness is below 100 nm. Despite this good coplanarity of both surfaces, each wafer is bended by several micrometers. Thus, a warp of the wafer two orders of magnitude above the thickness variation is not unusual. This bending is tolerated, as long as good site flatnesses are achieved, since all critical steps in IC fabrication (e.g. lithography) are adjusted to each site separately and the wafer is vacuum chucked in most cases. Nevertheless, the bending of a wafer can cause artefacts. It is, e.g., able to affect polishing processes like CMP in wafer manufacturing and in device fabrication. In this paper, we show that the local silicon removal during CMP can be affected by the wafer shape. For disadvantageous shaped wafers the local removal rate can differ 5-10%, strongly affecting the polishing results. Similar effects can be expected for other CMP processes too.