Accelerating Development Timeframes Through Effective Use of CMP Outsourcing
Conference: ICPT 2007 - International Conference on Planarization / CMP Technology
10/25/2007 - 10/27/2007 at Dresden, Germany
Proceedings: ICPT 2007
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Carroll, Roger (1Polar Semiconductor, Inc)
Rhoades, Robert L. (Entrepix, Inc., 3215 W. Fairmont Drive, Tempe, AZ 85282)
This paper describes a cost-effective approach to accelerating the development of a planarized interconnect module including both oxide and tungsten CMP unit processes. The results of this effort clearly show that the combination of existing in-fab process modules with outsource CMP capability can decrease the time required to develop a fully planarized integration scheme by approximately one year compared to original projections. Project phases related to integration of CMP were built around successive process levels in the proposed device flow leading up to a final prototype run. The phases were: (1) pre-metal dielectric (PMD) CMP, (2) tungsten contact formation (including etch, barrier dep, W dep, and W CMP), (3) ILD CMP, (4) via formation (including etch, barrier dep, W dep, and W CMP), (5) extension to 3rd level metal, and (6) live device prototype run. The integration team in the fab benefited numerous times from technical guidance given by the outsource provider on matters both directly and indirectly related to CMP. This collaborative effort enabled the fab to much more quickly develop working processes for contact etch, via etch, barrier metal deposition, W deposition, and other elements of the integration. Alignment marks, pattern density effects, barrier metal thickness, and numerous other technical issues were also resolved efficiently. Data will be presented showing several key phases of the integration for a specific set of test devices. Cross section SEM photos confirm that the physical contact and via structures can be fabricated with good repeatability. Process margins for each major unit operation were characterized and will be summarized where appropriate. End-of-line parametric data confirms that the new contact and via modules meet the proposed electrical specs. The most striking aspect of the project is the accelerated timeframe enabled through proper leveraging of outsourced CMP. All of the process development and integration work was accomplished at least one year earlier than would have been possible if the fab had been required to utilize only internal capabilities. This was driven by two primary factors. First, the team did not have to wait on internal CMP equipment to be purchased and installed, thus avoiding 6-9 months of delay. Second, the project was accelerated in several key cycles of learning by insights and guidance from the technical staff of the outsource CMP provider based on accumulated CMP and integration expertise. Overall, this project has demonstrated substantial benefits to the integration efforts of a semiconductor fab through proper leveraging of CMP outsourcing.