Yusa, Satoshi; Hiraka, Takaaki; Mizuochi, Jun; Fujii, Akiko; Sakai, Yuko; Kuriyama, Koki; Sakaki, Masashi; Sasaki, Shiho; Morikawa, Yasutaka; Mohri, Hiroshi; Hayashi, Naoya (Electronic Device Laboratory, Dai Nippon Printing Co., Ltd., 2-2-1 Fukuoka, Fujimino-shi, Saitama, Japan 356-8507)
Nano-imprint lithography (NIL) has been counted as one of the lithography canditates for hp32nm node and beyond. Recently, the small line edge roughness (LER) as well as the potentially high resolution that will ensure no-OPC mask feature is attracting many researchers. The template making is one of the most critical issues for the realization of NIL. Especially when we think of a practical template fabrication process on a 65mm square format that is going to be the industry standard, the resolution of the template making process showed a limitation. In this paper, as a continuation of our previous works, we summarize our progress of NIL template resolution improvement further resolution by optimizing the materials, their thicknesses, the developing and the etching processes, as well as the writing parameters of the 100keV SB (spot beam) writer. At the best resolved point on the template, resolutions down to hp (half pitch) 18nm on dense line patterns, hp20nm on dense hole patterns, and hp26nm on dense dot patterns were confirmed. Concerning stable pattern resolution over a certain field area, we evaluated pattern resolution through over a 250micrometer square area, which we think would be adequate for initial imprint tests. For the 250micrometer square area, we confirmed pattern resolution of hp24nm for dense line patterns and hp26nm for dense hole patterns. In addition, we have studied resolution limit of the 50keV VSB (variable shaped beam) photomask production writing tools, which have been commonly used tools in the 4X photomask manufacturing for larger field size patterning. Materials, process conditions and parameters acquired through the 100keV SB process were implanted, and we could fabricate templates with hp32nm dense line patterns, with acceptable full chip uniformity and writing time. We also studied the imprint capability, and fabricated a template with fine features and imprinted it onto a wafer. As a result, we could transfer hp24nm dense line patterns, hp24nm dense hole patterns, and hp32nm dense dot patterns onto the wafer.