Influences on accuracy of SEM based CD mask metrology with a view to the 32 nm node
Conference: EMLC 2008 - 24th European Mask and Lithography Conference
01/21/2008 - 01/24/2008 at Dresden, Germany
Proceedings: EMLC 2008
Pages: 11Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Häßler-Grohne, W.; Frase, C. G.; Gnieser, D.; Bosse, H. (PTB, Physikalisch-Technische Bundesanstalt, Bundesallee 100, 38116 Braunschweig, Germany)
Richter, J.; Wiswesser, A. (AMTC, Advanced Mask Technology Center, Rähnitzer Allee 9, 01109 Dresden, Germany)
Scanning electron microscopy (SEM) is used today and will be used also in the near future as a fast and high resolution measurement method capable to perform characterizations of the smallest isolated and dense features which are to be specified and produced on photomasks down to the 32 nm node and perhaps below. It has been demonstrated however, that SEM based CD metrology results on different mask absorber stacks may show systematic dependencies on the absorber materials and other stack parameters between different CD-SEM equipment. These mask dependent effects have to be taken into account for proper cross-correlation of different CD metrology tools, which is required in mask manufacturing environment. In this contribution we will report on systematic investigations of simulated and measured SEM profiles of line and space features present on current and future mask generations as well as on suitable test structures. The investigations comprise variations of SEM primary energy settings and the response of different edge operators on these variations as well as variations of edge angle of the mask features. The simulations are based on Monte Carlo methods which are supplemented by additional phenomenological approaches where appropriate. Simulations of SEM edge contrasts and the response of different CD-SEM edge algorithms will be described for feature sizes down to 32 nm, because the smallest assist-features on the mask which have to be controlled with respect to their dimensions are about the same size as the smallest feature sizes on the wafer.